Chao Luo

Education:

• University of Science and Technology of China, Applied Physics, Bachelor

• University of Science and Technology of China, Microelectronics and Solid-State electronics , PhD

Research Interest:

• Cryogenic Electron Devices

• Cryogenic Integrated Circuits Design

Publications:

• [1] Luo C, Li Z, Lu T T, et al. MOSFET characterization and modeling at cryogenic temperatures[J]. Cryogenics, 2019, 98: 12-17.

• [2] Chen S#, Luo C,# Zhang Y, et al. Current gain enhancement for silicon-on-insulator lateral bipolar junction transistors operating at liquid-helium temperature[J]. IEEE Electron Device Letters, 2020, 41(6): 800-803.

• [3] Li Z, Luo C, Lu T, et al. Modelling and kink correction of 0.18 μ m bulk CMOS at liquid helium temperature[J]. Electronics Letters, 2019, 55(14): 780-783.

• [4] Lu T T, Li Z, Luo C, et al. Characterization and Modeling of 0.18μm Bulk CMOS Technology at Sub-Kelvin Temperature[J]. IEEE Journal of the Electron Devices Society, 2020, 8: 897-904.

• [5] Luo C, Lu T, Li Z, et al. 0.18 μm CMOS Ring Oscillator at Liquid Helium Temperature[C]//2019 IEEE 3rd International Conference on Circuits, Systems and Devices (ICCSD). IEEE, 2019: 97-100.

• [6] Lu T, Luo C, Xu J, et al. Optimization of Filter and Operational Amplifier Based on Evolutionary Strategy[C]//Journal of Physics: Conference Series. IOP Publishing, 2021, 1729(1): 012002.