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A low dead time vernier delay line TDC implemented in an actel flash-based FPGA

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  • Journal:NUCLEAR SCIENCE AND TECHNIQUES

  • First Author:qinxi

  • Correspondence Author:qinxi

  • Document Code:000328922100012

  • Volume:24

  • Issue:4

  • ISSN No.:1001-8042

  • Translation or Not:no

  • Date of Publication:2013-08-20

  • Included Journals:SCI


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