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王永纲

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Paper Publications

[11] wangyonggang,wangyonggang.A Multi-Chain Merged Tapped Delay Line for High Precision Time-to-Digital Converters in FPGAs.IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS,2017,65(1):96-100.
[12] wangyonggang,wangyonggang.A 3.9-ps RMS Precision Time-to-Digital Converter Using Ones-Counter Encoding Scheme in a Kintex-7 FPGA.IEEE TRANSACTIONS ON NUCLEAR SCIENCE,2017,64(10):2713-2718.

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