11. S. Yang*, S. Liu, Y. Lu, C. Liu, and K. J. Chen, “AC-capacitance techniques for interface trap analysis in GaN-based buried-channel MIS-HEMTs,” IEEE Trans. Electron Devices, vol. 62, no. 6, pp. 1870–1878, June 2015
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上一条： 10. S. Yang*, Z. Tang, K. Wong, Y. Lin, C. Liu, Y. Lu, S. Huang, and K. J. Chen, “High-quality interface in Al2O3/GaN/AlGaN/GaN MIS-structures with in situ pregate plasma nitridation,” IEEE Electron Device Lett., vol. 34, no. 12, pp. 1497–1499, Dec. 2013. (ESI Highly Cited Paper; Featured in Compound Semiconductor and Semiconductor Today)
下一条： 12. S. Yang*, Y. Lu, H. Wang, S. Liu, C. Liu, and K. J. Chen, “Dynamic gate stress-induced VTH shift and its impact on dynamic RON in GaN MIS-HEMTs,” IEEE Electron Device Lett., vol. 37, no. 2, pp. 157–160, Feb. 2016